There is a tendency that the data rate in transmission and reception of a signal inside and outside an apparatus increases together with enhancement of a performance of an apparatus for a communication backbone or an information processing equipment such as a server.
A related art is disclosed in Japanese Laid-open Patent Publication No. 2006-041818, Japanese Laid-open Patent Publication No. 2007-142748, Japanese Laid-open Patent Publication No. 2009-171190, or Non-Patent Document “Clock/Data Recovery PLL using Half-Frequency Clock,” M. Rau, T. Oberst, R. Lares, A. Rothermel, R. Schweer, and N. Menoux IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 32, NO. 7, JULY 1997.